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Date:	Wed, 12 May 2010 23:21:54 +0100
From:	Jamie Lokier <jamie@...reable.org>
To:	"Shilimkar, Santosh" <santosh.shilimkar@...com>
Cc:	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Nicolas Pitre <nico@...vell.com>,
	Saeed Bishara <saeed@...vell.com>,
	"James E.J. Bottomley" <jejb@...isc-linux.org>,
	Andrew Morton <akpm@...ux-foundation.org>,
	"linux-ext4@...r.kernel.org" <linux-ext4@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: Rampant ext3/4 corruption on 2.6.34-rc7 with VIVT ARM (Marvell 88f5182)

Shilimkar, Santosh wrote:
> There was a memory write barrier missing before the DMA descriptors 
> are handed over to DMA controller.

On that note, are the cache flush functions implicit memory barriers?

-- Jamie
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