| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Wed, 20 Sep 2006 04:48:45 +1000 From: Nick Piggin <nickpiggin@...oo.com.au> To: paulmck@...ibm.com CC: Alan Stern <stern@...land.harvard.edu>, David Howells <dhowells@...hat.com>, Kernel development list <linux-kernel@...r.kernel.org> Subject: Re: Uses for memory barriers Paul E. McKenney wrote: > On Wed, Sep 20, 2006 at 03:51:29AM +1000, Nick Piggin wrote: >>If store forwarding is able to occur outside cache coherency protocol, >>then I don't see why not. I would also be interested to know if this >>is the case on real systems. > > > We are discussing multiple writes to the same variable, correct? > > Just checking... Correct. -- SUSE Labs, Novell Inc. Send instant messages to your online friends http://au.messenger.yahoo.com - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists