lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Fri, 22 Sep 2006 12:33:29 +0000
From:	Pavel Machek <pavel@...e.cz>
To:	Richard J Moore <richardj_moore@...ibm.com>
Cc:	prasanna@...ibm.com, Andrew Morton <akpm@...l.org>,
	Alan Cox <alan@...rguk.ukuu.org.uk>,
	Mathieu Desnoyers <compudj@...stal.dyndns.org>,
	"Frank Ch. Eigler" <fche@...hat.com>,
	Greg Kroah-Hartman <gregkh@...e.de>,
	Christoph Hellwig <hch@...radead.org>,
	Jes Sorensen <jes@....com>, Paul Mundt <lethal@...ux-sh.org>,
	linux-kernel <linux-kernel@...r.kernel.org>, ltt-dev@...fik.org,
	Martin Bligh <mbligh@...gle.com>,
	Michel Dagenais <michel.dagenais@...ymtl.ca>,
	Ingo Molnar <mingo@...e.hu>, systemtap@...rces.redhat.com,
	systemtap-owner@...rceware.org,
	Thomas Gleixner <tglx@...utronix.de>,
	William Cohen <wcohen@...hat.com>,
	Tom Zanussi <zanussi@...ibm.com>
Subject: Re: [PATCH] Linux Kernel Markers

Hi!

> > > > Very good idea.. However, overwriting the second instruction
> > with a jump could
> > > > be dangerous on preemptible and SMP kernels, because we never
> > know if a thread
> > > > has an IP in any of its contexts that would return exactly at
> > the middle of the
> > > > jump.
> > >
> > > No: on x86 it is the *same* case for all of these even writing an int3.
> > > One byte or a megabyte,
> > >
> > > You MUST ensure that every CPU executes a serializing instruction
> before
> > > it hits code that was modified by another processor. Otherwise you get
> > > CPU errata and the CPU produces results which vendors like to describe
> > > as "undefined".
> >
> > Are you referring to Intel erratum "unsynchronized cross-modifying code"
> > - where it refers to the practice of modifying code on one processor
> > where another has prefetched the unmodified version of the code.
> 
> In the special case of replacing an opcode with int3 that erratum doesn't
> apply. I know that's not in the manuals but it has been confirmed by the
> Intel microarchitecture group. And it's not reasonable to it to be any
> other way.

What about replacing int3 with old instruction (i.e. marker being
deleted)?
							Pavel

-- 
Thanks for all the (sleeping) penguins.
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ