lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Wed, 15 Nov 2006 13:49:21 -0500
From:	Jeff Garzik <jgarzik@...ox.com>
To:	Tejun Heo <htejun@...il.com>
CC:	Vasily Averin <vvs@...ru>, Alan Cox <alan@...rguk.ukuu.org.uk>,
	Jens Axboe <axboe@...nel.dk>, linux-kernel@...r.kernel.org,
	Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@...a.pw.edu.pl>,
	linux-ide@...r.kernel.org, devel@...nvz.org
Subject: Re: [Q] PCI Express and ide (native) leads to irq storm?

Tejun Heo wrote:
> In short, some piix controllers including ICH7, when put into enhanced 
> mode (PCI native mode), uses BMDMA Interrupt bit as interrupt 
> pending/clear bit for *all* commands.  ie. Reading STATUS does NOT clear 

Yep.  I thought I had mentioned this, ages ago.


> Fortunately, libata is immune to the problem because it does 
> ap->ops->irq_clear(ap) in ata_host_intr() regardless of command type in 
> flight.  So, not loading IDE piix and using libata to drive all piix 
> ports solves the problem.

Yep, that's intentional :)

	Jeff



-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ