linux-kernel - Re: [Ltt-dev] [PATCH] local_t : Documentation

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Date:	Tue, 9 Jan 2007 20:06:44 -0500
From:	Mathieu Desnoyers <compudj@...stal.dyndns.org>
To:	Pavel Machek <pavel@....cz>
Cc:	Andrew Morton <akpm@...l.org>, Greg Kroah-Hartman <gregkh@...e.de>,
	linux-kernel@...r.kernel.org,
	"Martin J. Bligh" <mbligh@...igh.org>,
	Christoph Hellwig <hch@...radead.org>,
	Douglas Niehaus <niehaus@...s.ku.edu>,
	Ingo Molnar <mingo@...hat.com>, ltt-dev@...fik.org,
	systemtap@...rces.redhat.com, Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [Ltt-dev] [PATCH] local_t : Documentation - update

* Mathieu Desnoyers (mathieu.desnoyers@...ymtl.ca) wrote:
> > So it is "one cpu may write, other cpus may read", and as big as
> > long. Are you sure obscure architectures (sparc?) can implement this
> > in useful way? ... maybe yes, unless obscure architecture exists where
> > second other cpu can see garbage data when first cpu writes into long
> > ...?
> > 
> > 
> 
> Sparc64 uses a memory barrier around the atomic operations in the SMP case
> (see arch/sparc64/lib/atomic.S). The same is true for sparc. As I am not a sparc
> expert, I left the asm-generic default behavior, but I think it should be safe
> to implement local.S code derived from atomic.S to optimize the speed of the
> local_t operations on sparc and sparc64. Can anyone confirm this ?
> 

Sorry for the self reply.. looking at arch/sparc/lib/atomic32.c tells me that
local.h could use its own version that would only disable interrupts without
taking any hashed spinlock.

sparc64 seems to be a saner architecture providing atomic operations wrt the
local CPU. A barrier-free version of arch/sparc64/lib/atomic.S would improve
performance.

Mathieu

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