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Date: Mon, 26 Mar 2007 17:09:51 -0700 From: Greg KH <greg@...ah.com> To: Mitch Williams <mitch.a.williams@...el.com>, Michael Ellerman <michael@...erman.id.au> Cc: linux-pci@...ey.karlin.mff.cuni.cz, gregkh@...e.de, ebiederm@...ssion.com, linux-kernel@...r.kernel.org, akpm@...ux-foundation.org, auke-jan.h.kok@...el.com Subject: Re: [PATCH 2.6.21-rc5] MSI: read-flush MSI-X table On Mon, Mar 26, 2007 at 04:18:22PM -0700, Mitch Williams wrote: > This patch fixes a kernel bug which is triggered when using the > irqbalance daemon with MSI-X hardware. > > Because both MSI-X interrupt messages and MSI-X table writes are posted, > it's possible for them to cross while in-flight. This results in > interrupts being received long after the kernel thinks they're disabled, > and in interrupts being sent to stale vectors after rebalancing. > > This patch performs a read flush after writes to the MSI-X table for > enable/disable and rebalancing operations. Because this is an expensive > operation, we do not perform the read flush after mask/unmask > operations. Hardware which supports MSI-X typically also supports some > sort of interrupt moderation, so a read-flush is not necessary for > mask/unmask operations. > > This patch has been validated with (unreleased) network hardware which > uses MSI-X. How well does this play with the MSI core changes that Michael Ellerman has proposed on the linux-pci mailing list? thanks, greg k-h - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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