linux-kernel - Re: [PATCH 2/2] msi: Add support for the Intel chipsets that support MSI.

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Date:	Fri, 25 May 2007 00:10:24 -0600
From:	ebiederm@...ssion.com (Eric W. Biederman)
To:	Andi Kleen <ak@...e.de>
Cc:	Greg Kroah-Hartman <gregkh@...e.de>,
	Jay Cliburn <jacliburn@...lsouth.net>,
	Grzegorz Krzystek <ninex@...ex.eu.org>,
	Andrew Morton <akpm@...ux-foundation.org>, ninex@...pl,
	linux-kernel@...r.kernel.org, linux-pci@...ey.karlin.mff.cuni.cz,
	Michael Ellerman <michael@...erman.id.au>,
	David Miller <davem@...emloft.net>,
	Tony Luck <tony.luck@...el.com>, len.brown@...el.com
Subject: Re: [PATCH 2/2] msi:  Add support for the Intel chipsets that support MSI.

Andi Kleen <ak@...e.de> writes:

> On Friday 25 May 2007 06:26:50 Eric W. Biederman wrote:
>> 
>> This patch is the result of a quick survey of the Intel chipset
>> documents.  I took a quick look in the document to see if the chipset
>> supported MSI and if so I looked through to find the vendor and device
>> id of device 0 function 0 of the chipset and added a quirk for that
>> device id if I it was not a duplicate. 
>
> It would be better to look for any PCI bridge. Sometimes there are
> different PCI bridges around (e.g. external PCI-X bridges on HT systems) 
> which might need own quirks

Maybe but pci-pci bridges should have no problems with MSI traffic
because at that level MSI is just a normal DMA write going upstream.

The AMD 8131 hypertransport to PCI-X bridge only failed because at the
connection to hypertransport it did not implement the hypertransport
msi mapping capability and the associated logic to convert an MSI
irq into a hypertranposrt IRQ.

I currently have a quirk that looks for any hypertransport msi mapping
capability and only enables MSI on the downstream bus of the bridge.

> Also in the x86 world Microsoft defined a FADT ACPI flag that MSI doesn't
> work for Vista. It might make sense to do
>
> if (dmi year >= 2007 && FADT.msi_disable not set) assume it works

Sounds reasonable to me.  If it happens to work reliably.

>> This patch should be safe.  The anecdotal evidence is that when dealing
>> with MSI the Intel chipsets just work.  If we find some buggy ones
>> changing the list won't be hard.
>
> The FADT bit should be probably checked anyways.

Sure if we have a way to check I have no problem, although I tend to
trust the hardware more.

Eric
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