00:00.0 Host bridge: Cyrix Corporation PCI Master Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- SERR- TAbort- SERR- Reset- 16bInt- PostWrite+ 16-bit legacy interface ports at 0001 00: 80 11 75 04 07 00 10 02 00 00 07 06 00 a8 02 00 10: 00 00 00 18 dc 00 00 02 00 01 04 b0 00 00 00 10 20: 00 f0 ff 13 00 00 00 14 00 f0 ff 17 00 10 00 00 30: fc 10 00 00 00 14 00 00 fc 14 00 00 0f 01 00 05 40: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:12.0 ISA bridge: Cyrix Corporation 5520 [Cognac] Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- SERR- TAbort- SERR- TAbort- SERR- 00: 59 12 17 a1 07 00 90 02 10 00 00 02 00 40 00 00 10: 01 10 00 00 00 00 00 14 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 02 01 00 00 59 12 17 a1 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40