linux-kernel - [M68KNOMMU]: use setup_irq() in ColdFire PIT timer

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Date:	Fri, 27 Jul 2007 01:09:00 +1000
From:	Greg Ungerer <gerg@...pgear.com>
To:	torvalds@...ux-foundation.org
Cc:	gerg@...inux.org, linux-kernel@...r.kernel.org
Subject: [M68KNOMMU]: use setup_irq() in ColdFire PIT timer

Use setup_irq() instead of request_irq() to set up system timer
in ColdFire PIT timer code. With the old m68knommu irq code this
was safe, but it is not now within the generic irq framework.

Signed-off-by: Greg Ungerer <gerg@...inux.org>
---

diff -Naur linux-2.6.23-rc1-git2/arch/m68knommu/platform/5307/pit.c linux/arch/m68knommu/platform/5307/pit.c
--- linux-2.6.23-rc1-git2/arch/m68knommu/platform/5307/pit.c	2007-07-26 10:47:41.000000000 +1000
+++ linux/arch/m68knommu/platform/5307/pit.c	2007-07-26 22:54:40.000000000 +1000
@@ -5,9 +5,8 @@
  *	         hardware timer only exists in the Freescale ColdFire
  *		 5270/5271, 5282 and other CPUs.
  *
- *	Copyright (C) 1999-2006, Greg Ungerer (gerg@...pgear.com)
+ *	Copyright (C) 1999-2007, Greg Ungerer (gerg@...pgear.com)
  *	Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
- *
  */
 
 /***************************************************************************/
@@ -17,8 +16,8 @@
 #include <linux/param.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/irq.h>
 #include <asm/io.h>
-#include <asm/irq.h>
 #include <asm/coldfire.h>
 #include <asm/mcfpit.h>
 #include <asm/mcfsim.h>
@@ -43,13 +42,18 @@
 
 /***************************************************************************/
 
+static struct irqaction coldfire_pit_irq = {
+	.name    = "timer",
+	.flags   = IRQF_DISABLED | IRQF_TIMER,
+};
+
 void coldfire_pit_init(irq_handler_t handler)
 {
 	volatile unsigned char *icrp;
 	volatile unsigned long *imrp;
 
-	request_irq(MCFINT_VECBASE + MCFINT_PIT1, handler, IRQF_DISABLED,
-		"ColdFire Timer", NULL);
+	coldfire_pit_irq.handler = handler;
+	setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &coldfire_pit_irq);
 
 	icrp = (volatile unsigned char *) (MCF_IPSBAR + MCFICM_INTC0 +
 		MCFINTC_ICR0 + MCFINT_PIT1);
-
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