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Date: Sat, 8 Sep 2007 04:13:12 +1000 From: Nick Piggin <nickpiggin@...oo.com.au> To: Linus Torvalds <torvalds@...ux-foundation.org> Cc: ak@...e.de, Jesse Barnes <jesse.barnes@...el.com>, linux-kernel@...r.kernel.org Subject: Re: Intel Memory Ordering White Paper On Sunday 09 September 2007 03:48, Nick Piggin wrote: > There is some suggestion in the source code that non-temporal stores > (movntq) are weakly ordered. But AFAIKS from the documents, it is ordered > when operating on wb memory. What's the situation there? Sorry, it looks from the AMD document like nontemporal stores to wb memory can go out of order. It is a bit hard to decipher what the types mean. If this is the case, we can either retain the sfence in smp_wmb(), or noop it, and put explicit sfences around any place that performs nontemporal stores... Anyway, the lfence should be able to go away without so much trouble. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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