linux-kernel - Re: [PATCH 2/3] Add GD-Rom support to the SEGA Dreamcast

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Date:	Mon, 17 Dec 2007 06:59:29 +0900
From:	Paul Mundt <lethal@...ux-sh.org>
To:	Adrian McMenamin <adrian@...golddream.dyndns.info>
Cc:	Adrian McMenamin <lkmladrian@...il.com>,
	linux-kernel@...r.kernel.org, linux-ide@...r.kernel.org,
	linux-sh@...r.kernel.org, axboe@...nel.dk
Subject: Re: [PATCH 2/3] Add GD-Rom support to the SEGA Dreamcast

On Sun, Dec 16, 2007 at 05:32:51PM +0000, Adrian McMenamin wrote:
> On Sun, 2007-12-16 at 18:50 +0900, Paul Mundt wrote:
> > > +	for (count = 0xa0000000; count < 0xa0200000; count += 4)
> > > +		ctrl_inl(count);
> > 
> > Er? This ranged dummy reading of the P2 space needs some explanation. The
> > GD-ROM isn't even mapped in to this space, so this seems like a hack to
> > either work around a timing issue or a write ordering problem.
> 
> I'll confess to not knowing what it's up to here either, other than it
> looks like a mechanism to cause a G1 bus reset. This is a progressive
> read of the Boot ROM area and that is all under G1 control (as is the GD
> Rom obviously)
> 
Ok, then this should be moved out to a g1_bus_reset() or something
similar with a comment explaining what it's doing, that way it can be
trivially reworked if a saner method of forcing a G1 reset is discovered.

While I realize that this is all undocumented and based entirely on
reverse engineering, you should at least verify that that's precisely
what is going on, and that this is not just a precaution for flushing
posted writes. You can test that by removing the loop and doing a dummy
read after your write (to the same register, rather than the entire ROM
space). If it's a posting issue, then you will have to do your own
read/write_reg routines that handle the flush.
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