linux-kernel - memory-barriers.txt: cache coherency vs mmio

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Date:	Wed, 26 Mar 2008 22:09:57 +0100
From:	Stefan Richter <stefanr@...6.in-berlin.de>
To:	linux-kernel@...r.kernel.org
Subject: memory-barriers.txt: cache coherency vs mmio

The subject section in memory-barriers.txt says:

"[...] MMIO accesses may, in effect, overtake accesses to cached memory 
that were emitted earlier. A memory barrier isn't sufficient in such a 
case, but rather the cache must be flushed between the cached memory 
write and the MMIO access if the two are in any way dependent."

And the lowly driver programmer immediately asks:
How do I flush the cache?

In particular, do I have to do anyhing between

	coherent_dma_buffer->datum = something;

	writel(YOU_CAN_START_DMA_NOW, register);

Thanks,
-- 
Stefan Richter
-=====-==--- --== ==-=-
http://arcgraph.de/sr/
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/