linux-kernel - Re: PIIX4 DMA Timeout

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Date:	Wed, 21 May 2008 09:08:24 +0800
From:	gshan <gshan@...atel-lucent.com>
To:	"Maciej W. Rozycki" <macro@...ux-mips.org>
CC:	linux-kernel@...r.kernel.org
Subject: Re: PIIX4 DMA Timeout

Maciej W. Rozycki wrote:
> On Tue, 20 May 2008, Gavin Shan wrote:
>
>   
>> There has one MV64460 on my board, which includes 2 PCI bridges. PIIX4 is on slot 3 of PCI1.
>> But now, IDE driver reported it's timeouted on DMA operation. Thanks in advance for your
>> suggestions.
>>     
> [...]
>   
>> PIIX4: chipset revision 1
>> PIIX4: not 100% native mode: will probe irqs later
>>     ide0: BM-DMA at 0xd8000000-0xd8000007, BIOS settings: hda:pio, hdb:pio
>>     ide1: BM-DMA at 0xd8000008-0xd800000f, BIOS settings: hdc:pio, hdd:pio
>> hdc: HTE721010G9AT00, ATA DISK drive
>> hdc: max request size: 512KiB
>> hdc: 195371568 sectors (100030 MB) w/7539KiB Cache, CHS=16383/255/63, UDMA(33)
>> hdc: cache flushes supported
>>  hdc:<4>hdc: dma_timer_expiry: dma status == 0x26
>> hdc: DMA interrupt recovery
>> hdc: lost interrupt
>> hdc: dma_intr: status=0x58 { DriveReady SeekComplete DataRequest }
>> ide: failed opcode was: unknown
>> hdc: DMA disabled
>> ide1: reset: success
>>  hdc2 hdc3 hdc4
>>     
>
>  It looks like some problem with interrupt routing.  At least with some of
> the PIIX chips I recall there was some limitation about how the IDE
> interrupts had to be used for DMA to be operational.  For PIO modes there
> were no restrictions.  Do you have chip-level documentation for your
> board?
>
>   Maciej
>   
Maciej, thank you very much for your reply. I don't think this was caused by
interrupt routing. I added lots of "printk" before following output, and saw
interrupts could be triggered correctly.

hdc: 195371568 sectors (100030 MB) w/7539KiB Cache, CHS=16383/255/63, UDMA(33)

LynxOS has been run successfully on this board, and we want port it to Linux recently.

I'm not sure which resource (I/O or Memory space) should be used for DMA operation because
all memory resources haven't been set (the flag is 0x2xxxxxxx). So my question is DMA operation
could succeed with I/O resource?


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