lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Thu, 10 Jul 2008 14:07:29 -0700
From:	ebiederm@...ssion.com (Eric W. Biederman)
To:	Ingo Molnar <mingo@...e.hu>
Cc:	Suresh Siddha <suresh.b.siddha@...el.com>, hpa@...or.com,
	tglx@...utronix.de, akpm@...ux-foundation.org,
	arjan@...ux.intel.com, andi@...stfloor.org,
	jbarnes@...tuousgeek.org, steiner@....com,
	linux-kernel@...r.kernel.org
Subject: Re: [patch 00/26] x64, x2apic/intr-remap: Interrupt-remapping and x2apic support

Ingo Molnar <mingo@...e.hu> writes:

> * Eric W. Biederman <ebiederm@...ssion.com> wrote:
>
>> A lot of your code is generic, and some of it is for just x86_64.  
>> Since the cpus are capable of running in 32bit mode.  We really need 
>> to implement x86_32 and x86_64 support in the same code base.  Which I 
>> believe means factoring out pieces of io_apic_N.c into things such as 
>> msi.c that can be shared between the two architectures.
>
> i think the APIC code should be fully unified down the line - the 
> APIC/IOAPIC knows little about the mode the CPU is running in and has to 
> be programmed the same way independent of which mode the CPU is in. The 
> current fork between the 32-bit and 64-bit APIC code is in good part 
> artificial.

I completely agree.  However
1) There is a fair amount of work involved in the unification so taking it in small pieces
   is good.
2) We are doing much more then we should in ioapic_N.c anyway.

So it makes sense to grab the pieces we are actively working on factor them out and unify them
first.

The basic model I expect will end up looking something like:
Type of cpu irq reception.  PIC mode, local APIC mode, ???? Virtualized modes????
Type of irq source.  ioapic, msi, htirq, ??? Virtualized source ????
Type of configuration mptable, acpi mps table.

Some of this we have split out today and nicely factored.  Other parts we don't.

In particular for setting up msi and ioapics we use exactly the same mapping
of bits.  So we describe things a little differently from the irq reception layer
to the irq sending layer we should be able to reuse exactly the same msi and ioapic code
instead of having their setup methods test for irq_remapping().

Eric
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ