linux-kernel - Re: [PATCH] x86: let 32bit use apic

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Date:	Mon, 14 Jul 2008 22:09:08 +0400
From:	Cyrill Gorcunov <gorcunov@...il.com>
To:	"Maciej W. Rozycki" <macro@...ux-mips.org>
Cc:	Suresh Siddha <suresh.b.siddha@...el.com>,
	Yinghai Lu <yhlu.kernel@...il.com>,
	Ingo Molnar <mingo@...e.hu>,
	Thomas Gleixner <tglx@...utronix.de>,
	"H. Peter Anvin" <hpa@...or.com>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] x86: let 32bit use apic_ops too

[Maciej W. Rozycki - Mon, Jul 14, 2008 at 06:20:26PM +0100]
| On Mon, 14 Jul 2008, Cyrill Gorcunov wrote:
| 
| > Maciej, but if we eliminate LOCK# by using simple MOV there will not
| > be guarantee for atomicity. Am I wrong?
| 
|  You are right, but we do not care about atomicity.  We only care about
| interrupts.  This is because the local APIC is private to its associated
| CPU and inaccessible from the outside, at least for writes (mind the
| Remote Read command), so as long as the local CPU does not issue
| consecutive write cycles, there is no problem with another CPU getting in
| the way.  Which means any RMW instruction would suffice here, with the R
| part of the cycle separating any possible preceding write from one
| immediately following, but unfortunately the only one we can use is the
| XCHG and it has always implied the LOCK#, since the 8086, which at that
| point was considered a microoptimization (the LOCK# was cheap and an extra
| memory byte, otherwise needed for the LOCK prefix, expensive back then).  
| So atomicity is an unfortunate side effect rather than a part of the
| design here.
| 
|  Now if we know the APIC does not suffer from the double-write erratum,
| then we can use a straight MOV as consecutive writes are not a concern
| anymore.
| 
|   Maciej
| 

  Maciej, check me please (it's a bit shame but I don't understand the problem
that deep) - we have only two errata here 3AP and 11AP. 3AP says - "Writes to
error register clears register" so we don't care about locking there since
our mostly task is to read error number or clear it (well we're recommened
to write before read - but that is different and not related to the hw
error).

  The second problem - 11AP says the following: "Back to back assertions of
HOLD or BOFF# may cause lost APIC write cycle". For this case we use LOCK#
since - HOLD is not recognized during LOCK cycles (as Intel docs says).

  Did I miss something? Or maybe it's completely out-of-topic? :)

		- Cyrill -
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