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Date:	Wed, 3 Sep 2008 21:20:23 -0700 (PDT)
From:	Linus Torvalds <torvalds@...ux-foundation.org>
To:	Arjan van de Ven <arjan@...radead.org>
cc:	Alok Kataria <akataria@...are.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Larry Finger <Larry.Finger@...inger.net>,
	LKML <linux-kernel@...r.kernel.org>,
	"Rafael J. Wysocki" <rjw@...k.pl>, Michael Buesch <mb@...sch.de>,
	Dan Hecht <dhecht@...are.com>
Subject: Re: [PATCH] Fix TSC calibration issues



On Wed, 3 Sep 2008, Arjan van de Ven wrote:
>
> On Wed, 3 Sep 2008 20:59:05 -0700 (PDT)
> Linus Torvalds <torvalds@...ux-foundation.org> wrote:
> 
> > The only frequency we can trust on 99% of all machines is the PIT,
> 
> pmtimer is also quite ok, with the exception of some K6 based boxes.
> (I'm surprised the K6 boxes even have enough modern stuff to have
> pmtimer; I'd think they would fall under the date cutoff)

Quite frankly, pmtimer isn't all that much better than PIT. It has a 
slightly bigger range, but it has a much more limited format, and it 
doesn't have a reliable frequency. It was designed for something else.

At least HPET is clearly better than PIT as a _timer_.

All the big HPET problems are with its idiotic interface. 

Of course, in any _sane_ situation, the timer really would have been in 
the local APIC instead, with a fixed and architected frequency, and it 
should run in all power states. But noo, that obviously won't ever work, 
because that would have been _sensible_.

> one of the options we have is to start with an initial
> rough-but-conservative estimate, and refine it over time as the system
> is running.... sort of like ntp but for the calibration.

I do agree that we could aim for something like that. But even to get the 
rough estimate, we'd probably have to do the 5ms thing.

> another option for calibrating the tsc rate is to read it from the
> msr's/cpuid/aperf of what the hardware says it should be, and then all
> we need is to verify it is that; that we could do over timer or quickly.
> (of course that only works for systems with constant tsc)

I don't think it's reliable even for systems with a constant TSC. Because 
the msr/cpuid thing isn't going to actualyl give the right frequency. It 
might be the frequency the thing is _rated_ at, but it will be off when 
people over- or under-clock the front-side bus etc.

This is why it's so important that the clock input be a _known_ frequency. 
The thing that makes the PIT still so useful is not that it's a good 
timer, but that we *know* the frequency it runs at.

			Linus
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