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Date:	Wed, 1 Oct 2008 15:29:24 +0200 (CEST)
From:	Jiri Kosina <jkosina@...e.cz>
To:	"Allan, Bruce W" <bruce.w.allan@...el.com>
cc:	"Brandeburg, Jesse" <jesse.brandeburg@...el.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-netdev@...r.kernel.org" <linux-netdev@...r.kernel.org>,
	"kkeil@...e.de" <kkeil@...e.de>,
	"agospoda@...hat.com" <agospoda@...hat.com>,
	"arjan@...ux.intel.com" <arjan@...ux.intel.com>,
	"Graham, David" <david.graham@...el.com>,
	"Ronciak, John" <john.ronciak@...el.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	"chris.jones@...onical.com" <chris.jones@...onical.com>,
	"tim.gardner@...el.com" <tim.gardner@...el.com>,
	"airlied@...il.com" <airlied@...il.com>, Olaf Kirch <okir@...e.cz>
Subject: RE: [RFC PATCH 11/12] e1000e: write protect ICHx NVM to prevent
 malicious write/erase

On Tue, 30 Sep 2008, Allan, Bruce W wrote:

> Yeah, we can do that.  I need to amend the patch a bit to prevent the 
> protected range lock from being lifted unintentionally and will add some 
> debug statements if/when any write/erase cycles fail.

Olaf raised a rather interesting question -- would iAMT be able to access 
NVM contents directly, even if the lock bit would be set on the device? 
I.e. is iAMT allowed direct access to the EEPROM contents, bypassing 
shadow ram mappings?

Thanks,

-- 
Jiri Kosina
SUSE Labs

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