linux-kernel - [tip:x86/cpu] x86: cacheinfo: complete L2/L3 Cache and TLB associativity field definitions

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Date:	Fri, 10 Apr 2009 14:06:02 GMT
From:	Andreas Herrmann <andreas.herrmann3@....com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...hat.com,
	andreas.herrmann3@....com, mark.langsdorf@....com,
	tglx@...utronix.de, mingo@...e.hu
Subject: [tip:x86/cpu] x86: cacheinfo: complete L2/L3 Cache and TLB associativity field definitions

Commit-ID:  6265ff19ca08df0d96c859ae5e4dc2d9ad07070e
Gitweb:     http://git.kernel.org/tip/6265ff19ca08df0d96c859ae5e4dc2d9ad07070e
Author:     Andreas Herrmann <andreas.herrmann3@....com>
AuthorDate: Thu, 9 Apr 2009 15:47:10 +0200
Committer:  Ingo Molnar <mingo@...e.hu>
CommitDate: Fri, 10 Apr 2009 15:41:18 +0200

x86: cacheinfo: complete L2/L3 Cache and TLB associativity field definitions

See "CPUID Specification" (AMD Publication #: 25481, Rev. 2.28, April 2008)

Signed-off-by: Andreas Herrmann <andreas.herrmann3@....com>
Cc: Mark Langsdorf <mark.langsdorf@....com>
LKML-Reference: <20090409134710.GA8026@...erich.amd.com>
Signed-off-by: Ingo Molnar <mingo@...e.hu>


---
 arch/x86/kernel/cpu/intel_cacheinfo.c |   16 ++++++++++++----
 1 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index d46a849..789efe2 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -200,10 +200,17 @@ union l3_cache {
 };
 
 static const unsigned short __cpuinitconst assocs[] = {
-	[1] = 1, [2] = 2, [4] = 4, [6] = 8,
-	[8] = 16, [0xa] = 32, [0xb] = 48,
+	[1] = 1,
+	[2] = 2,
+	[4] = 4,
+	[6] = 8,
+	[8] = 16,
+	[0xa] = 32,
+	[0xb] = 48,
 	[0xc] = 64,
-	[0xf] = 0xffff // ??
+	[0xd] = 96,
+	[0xe] = 128,
+	[0xf] = 0xffff /* fully associative - no way to show this currently */
 };
 
 static const unsigned char __cpuinitconst levels[] = { 1, 1, 2, 3 };
@@ -264,7 +271,8 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
 	eax->split.type = types[leaf];
 	eax->split.level = levels[leaf];
 	if (leaf == 3)
-		eax->split.num_threads_sharing = current_cpu_data.x86_max_cores - 1;
+		eax->split.num_threads_sharing =
+			current_cpu_data.x86_max_cores - 1;
 	else
 		eax->split.num_threads_sharing = 0;
 	eax->split.num_cores_on_die = current_cpu_data.x86_max_cores - 1;
--
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