linux-kernel - Re: [PATCH -tip] perf_counter tools: shorten names for events

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Date:	Thu, 25 Jun 2009 09:59:35 +0530
From:	Jaswinder Singh Rajput <jaswinder@...nel.org>
To:	Thomas Gleixner <tglx@...utronix.de>
Cc:	Ingo Molnar <mingo@...e.hu>, Peter Zijlstra <peterz@...radead.org>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH -tip] perf_counter tools: shorten names for events

On Wed, 2009-06-24 at 23:00 +0200, Thomas Gleixner wrote:
> On Thu, 25 Jun 2009, Jaswinder Singh Rajput wrote:
> > On Tue, 2009-06-23 at 21:56 +0200, Ingo Molnar wrote:
> > 
> >       248064467  L1-data-Cache-Load-Referencees  (scaled from 23.27%)
> >       283542921  dL1-loads             (scaled from 23.28%)
> 
> Where is the point of this? dL1-loads is a completely non intuitive
> artificial abbreviation.
>  
> Changing "L1-data-Cache-Load-Referencees" to "L1-dcache-loads" or
> something similar provides a short but sufficiently self explaining
> explanation of the counter.
> 
> I don't want to use a abbreviations dictionary to decode a perf
> report.

Of course we need to shorten the event names, currently they are too
long and need at least 45 characters only for names, how can we show
another useful info on the screen.

Please suggest some better short names for :

  L1-data-Cache-Load-Reference                  [Hardware cache event]
  L1-data-Cache-Load-Miss                       [Hardware cache event]
  L1-data-Cache-Store-Reference                 [Hardware cache event]
  L1-data-Cache-Store-Miss                      [Hardware cache event]
  L1-data-Cache-Prefetch-Reference              [Hardware cache event]
  L1-data-Cache-Prefetch-Miss                   [Hardware cache event]
  L1-instruction-Cache-Load-Reference           [Hardware cache event]
  L1-instruction-Cache-Load-Miss                [Hardware cache event]
  L1-instruction-Cache-Store-Reference          [Hardware cache event]
  L1-instruction-Cache-Store-Miss               [Hardware cache event]
  L1-instruction-Cache-Prefetch-Reference       [Hardware cache event]
  L1-instruction-Cache-Prefetch-Miss            [Hardware cache event]
  L2-Cache-Load-Reference                       [Hardware cache event]
  L2-Cache-Load-Miss                            [Hardware cache event]
  L2-Cache-Store-Reference                      [Hardware cache event]
  L2-Cache-Store-Miss                           [Hardware cache event]
  L2-Cache-Prefetch-Reference                   [Hardware cache event]
  L2-Cache-Prefetch-Miss                        [Hardware cache event]
  Data-TLB-Cache-Load-Reference                 [Hardware cache event]
  Data-TLB-Cache-Load-Miss                      [Hardware cache event]
  Data-TLB-Cache-Store-Reference                [Hardware cache event]
  Data-TLB-Cache-Store-Miss                     [Hardware cache event]
  Data-TLB-Cache-Prefetch-Reference             [Hardware cache event]
  Data-TLB-Cache-Prefetch-Miss                  [Hardware cache event]
  Instruction-TLB-Cache-Load-Reference          [Hardware cache event]
  Instruction-TLB-Cache-Load-Miss               [Hardware cache event]
  Instruction-TLB-Cache-Store-Reference         [Hardware cache event]
  Instruction-TLB-Cache-Store-Miss              [Hardware cache event]
  Instruction-TLB-Cache-Prefetch-Reference      [Hardware cache event]
  Instruction-TLB-Cache-Prefetch-Miss           [Hardware cache event]
  Branch-Cache-Load-Reference                   [Hardware cache event]
  Branch-Cache-Load-Miss                        [Hardware cache event]
  Branch-Cache-Store-Reference                  [Hardware cache event]
  Branch-Cache-Store-Miss                       [Hardware cache event]
  Branch-Cache-Prefetch-Reference               [Hardware cache event]
  Branch-Cache-Prefetch-Miss                    [Hardware cache event]

Thanks,
--
JSR

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