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Date:	Wed, 1 Jul 2009 00:42:20 +0200
From:	Ingo Molnar <mingo@...e.hu>
To:	Jaswinder Singh Rajput <jaswinder@...nel.org>,
	Paul Mackerras <paulus@...ba.org>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	Peter Zijlstra <peterz@...radead.org>,
	x86 maintainers <x86@...nel.org>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH -tip] perf_counter: Add Generalized Hardware FPU
	support for AMD


* Jaswinder Singh Rajput <jaswinder@...nel.org> wrote:

> > Plus things like mmx-3dnow are AMD specific, sse-sse2 is x86 
> > specific. We definitely want this general table, but the events 
> > should be truly general.
> 
> mmx and sse are available for both Intel and AMD. Thats why I 
> added both of them. Is it OK.

'3dnow' is an AMD marketing term. (and is long obsolete)

Nor did you answer (or understand) my sentence above: 'sse' is an 
x86 specific term.

I think a naming and enumeration scheme around the general concept 
of 'vectored co-processor' would be far less x86 specific.

Mockup:

        19583739  vec-adds               (   2.01x scaled)
        20856051  vec-muls               (   2.01x scaled)
        20856051  vec-divs               (   2.01x scaled)
     25100224054  vec-idle-cycles        (   1.99x scaled)
        12540131  vec-busy-cycles        (   1.99x scaled)
        42286702  vec-ops                (   2.01x scaled)

Paulus: would this categorization fit PowerPC too?

	Ingo
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