lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:	Thu, 10 Sep 2009 17:15:59 -0400
From:	Steven Rostedt <rostedt@...dmis.org>
To:	Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>
Cc:	Jason Baron <jbaron@...hat.com>, linux-kernel@...r.kernel.org,
	roland@...hat.com, rth@...hat.com, mingo@...e.hu
Subject: Re: [PATCH 0/4] RFC: jump label - (tracepoint optimizations)

On Mon, 2009-09-07 at 13:06 -0400, Mathieu Desnoyers wrote:
> * Mathieu Desnoyers (mathieu.desnoyers@...ymtl.ca) wrote:
> > * Jason Baron (jbaron@...hat.com) wrote:
> [...]
> > > Solution:
> > > 
> > > In discussing this problem with Roland McGrath and Richard Henderson, we came 
> > > up with a new 'asm goto' statement that allows branching to a label. Thus, this
> > > patch set introdues a 'STATIC_JUMP_IF()' macro as follows:
> > > 
> > > #ifdef HAVE_STATIC_JUMP
> > > 
> > > #define STATIC_JUMP_IF(tag, label, cond)                               \
> > >        asm goto ("1:"   /* 5-byte insn */                              \
> > >           P6_NOP5                                                      \
> > 
> > Hrm, be careful there. P6_NOP5 is not always a single instruction. If
> > you are preempted in the middle of it, bad things could happen, even
> > with stop_machine, if you iret in the middle the of the new jump
> > instruction. It could cause an illegal instruction fault. You should use
> > an atomic nop5. I think the function tracer already does, since I
> > told Steven about this exact issue.
> > 
> 
> Just to clarify this statement:
> 
> P6_NOP5 happens to be an atomic nop, but nothing states this requirement
> in arch/x86/include/asm/nops.h. Other 5-bytes nops are defined as
> multiple instructions (e.g. 2 bytes + 3 bytes nops). So I recommend to
> create a family of ATOMIC_P6_NOP5 (and other ATOMIC_*_NOP5 defines) to
> document this atomicity requirement.

Although I agree that we probably should place a comment in that file, I
highly doubt anyone will change that. But who knows?

> 
> Ftrace could probably handle this more gracefully than it does at the
> moment. It basically assumes that P6_NOP5 is atomic, and falls back on a
> 5-bytes jmp if it detects that P6_NOP5 faults.
> 
> That's coherent with the
> "TODO: check the cpuid to determine the best nop."
> 
> present in x86 ftrace.c.
> 
> So, at the very least, if we rely on nops.h having a single-instruction
> P6_NOP5 5 bytes nop, a comment to that effect should be added to nops.h.

I might as well go add one.

-- Steve


--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ