linux-kernel - Re: 2.6.32 regression (bisected): Video tearing/glitching with T400 laptops

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Date:	Thu, 8 Oct 2009 10:36:20 -0700
From:	Jesse Barnes <jbarnes@...tuousgeek.org>
To:	"Theodore Ts'o" <tytso@....edu>
Cc:	Eric Anholt <eric@...olt.net>, linux-kernel@...r.kernel.org
Subject: Re: 2.6.32 regression (bisected): Video tearing/glitching with T400
 laptops

On Fri, 02 Oct 2009 18:40:27 -0400
"Theodore Ts'o" <tytso@....edu> wrote:

> Hi, 
> 
> In recent kernels, my X display (running with a KMS-enabled X server)
> has been very jittery and with lots of glitching and tearing --- sorry
> if this isn't the correct technical term, not sure what it is --- on
> my T400 Lenovo laptop.   It seems related to what is on the desktop,
> and moving the mouse does seem to affect the rate and percentage of
> the screen which jitters --- which is enough to be very distracting,
> although I can still read the contents of the windows where the screen
> is tearing/glitching/flashing.
> 
> I bisected it down to this commit:

Can you give this patch a try?  It seems to work for Keith at least,
and it sounds like he was seeing the same problem.

-- 
Jesse Barnes, Intel Open Source Technology Center

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0466ddb..3bef091 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1791,6 +1791,7 @@
 
 #define DSPFW1			0x70034
 #define DSPFW2			0x70038
+#define   G4X_FBC_WM_EN		(1<<31) /* GM45+ only */
 #define DSPFW3			0x7003c
 #define   IGD_SELF_REFRESH_EN	(1<<30)
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7a5fb79..be1fb2b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1061,6 +1061,9 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
 		   (interval << DPFC_RECOMP_TIMER_COUNT_SHIFT));
 	I915_WRITE(DPFC_FENCE_YOFF, crtc->y);
 
+	/* Use FBC watermark calculations */
+	I915_WRITE(DSPFW2, I915_READ(DSPFW2) | G4X_FBC_WM_EN);
+
 	/* enable it... */
 	I915_WRITE(DPFC_CONTROL, I915_READ(DPFC_CONTROL) | DPFC_CTL_EN);
 
@@ -1078,6 +1081,8 @@ void g4x_disable_fbc(struct drm_device *dev)
 	I915_WRITE(DPFC_CONTROL, dpfc_ctl);
 	intel_wait_for_vblank(dev);
 
+	I915_WRITE(DSPFW2, I915_READ(DSPFW2) & ~G4X_FBC_WM_EN);
+
 	DRM_DEBUG("disabled FBC\n");
 }
 

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