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Date:	Sat, 07 Nov 2009 16:59:19 -0600
From:	Arjan van de Ven <arjan@...ux.intel.com>
To:	Thomas Renninger <trenn@...e.de>
CC:	"Luis R. Rodriguez" <lrodriguez@...eros.com>, davej@...hat.com,
	cpufreq@...r.kernel.org, linux-kernel@...r.kernel.org,
	mcgrof@...il.com, Matthew Garrett <mjg@...hat.com>,
	Reinette Chatre <reinette.chatre@...el.com>,
	Aeolus Yang <Aeolus.Yang@...eros.com>,
	Amod Bodas <Amod.Bodas@...eros.com>,
	David Quan <David.Quan@...eros.com>,
	Kishore Jotwani <Kishore.Jotwani@...eros.com>
Subject: Re: [PATCH] cpu-freq: add troubleshooting section for FSB changes

>> in addition, most FSB systems have the memory controller in the chipset,
>> next to the PCI logic... so that the FSB bus for DMA transactions only
>> carries the snoop traffic, not the whole data.
> So when should people look at this?

at this point the atheros folks haven't even confirmed that this is the cause...

I'm not saying that the linux behavior is optimal with P states (I have a rather
sizeable algorithm rewrite in the queue) but to blame anything and everything on
a half-speed FSB during a very idle system?
I'm still somewhat skeptical. Again.. the CPU is basically idle here (otherwise
ondemand would ramp the freq up quickly); at which point the FSB traffic mostly is
just cache coherency traffic.... much less bandwidth intensive.
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