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Date:	Mon, 18 Jan 2010 10:58:25 -0500
From:	Masami Hiramatsu <mhiramat@...hat.com>
To:	Jim Keniston <jkenisto@...ibm.com>
CC:	Peter Zijlstra <peterz@...radead.org>,
	Srikar Dronamraju <srikar@...ux.vnet.ibm.com>,
	Ingo Molnar <mingo@...e.hu>,
	Arnaldo Carvalho de Melo <acme@...radead.org>,
	Ananth N Mavinakayanahalli <ananth@...ibm.com>,
	utrace-devel <utrace-devel@...hat.com>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Maneesh Soni <maneesh@...ibm.com>,
	Mark Wielaard <mjw@...hat.com>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [RFC] [PATCH 1/7] User Space Breakpoint Assistance Layer (UBP)

Jim Keniston wrote:
> Not really.  For #3 (boosting), you need to know everything for #2,  
> plus be able to compute the length of each instruction -- which we can  
> now do for x86.  To emulate an instruction (#4), you need to replicate  
> what it does, side-effects and all.  The x86 instruction set seems to  
> be adding new floating-point instructions all the time, and I bet even  
> Masami doesn't know what they all do, but so far, they all seem to  
> adhere to the instruction-length rules encoded in Masami's instruction  
> decoder.

Actually, current x86 decoder doesn't support FP(x87) instructions.(even
it already supported AVX) But I think it's not so hard to add it.

Thank you,

-- 
Masami Hiramatsu

Software Engineer
Hitachi Computer Products (America), Inc.
Software Solutions Division

e-mail: mhiramat@...hat.com

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