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Date:	Thu, 21 Jan 2010 01:32:05 +0000
From:	Jamie Lokier <jamie@...reable.org>
To:	KOSAKI Motohiro <kosaki.motohiro@...fujitsu.com>
Cc:	anfei <anfei.zhou@...il.com>, linux-kernel@...r.kernel.org,
	linux-mm@...ck.org, linux@....linux.org.uk
Subject: Re: cache alias in mmap + write

KOSAKI Motohiro wrote:
>  2. Add some commnet. almost developer only have x86 machine. so, arm
>     specific trick need additional explicit explanation. otherwise anybody
>     might break this code in the future.

That's Documentation/cachetlb.txt.

What's being discussed here is not ARM-specific, although it appears
maintainers of different architecture (ARM and MIPS for a start) may
have different ideas about what they are guaranteeing to userspace.
It sounds like MIPS expects userspace to use msync() sometimes (even
though Linux msync(MS_INVALIDATE) is quite broken), and ARM expects to
to keep mappings coherent automatically (which is sometimes slower
than necessary, but usually very helpful).

>  3. Resend the patch. original mail isn't good patch format. please
>  consider to reduce akpm suffer.

This type of change in generic code would need review from a number of
architecture maintainers, I'd expect.

-- Jamie
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