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Date: Thu, 04 Mar 2010 13:00:19 +1100 From: Benjamin Herrenschmidt <benh@...nel.crashing.org> To: James Bottomley <James.Bottomley@...senPartnership.com> Cc: FUJITA Tomonori <fujita.tomonori@....ntt.co.jp>, catalin.marinas@....com, mdharm-kernel@...-eyed-alien.net, oliver@...kum.org, linux@....linux.org.uk, greg@...ah.com, x0082077@...com, sshtylyov@...mvista.com, bigeasy@...utronix.de, linux-usb@...r.kernel.org, linux-kernel@...r.kernel.org, santosh.shilimkar@...com, pavel@....cz, tom.leiming@...il.com, linux-arm-kernel@...ts.infradead.org Subject: Re: USB mass storage and ARM cache coherency On Wed, 2010-03-03 at 11:10 +0530, James Bottomley wrote: > On Wed, 2010-03-03 at 16:10 +1100, Benjamin Herrenschmidt wrote: > > On Wed, 2010-03-03 at 12:47 +0900, FUJITA Tomonori wrote: > > > The ways to improve the approach (introducing PG_arch_2 or marking a > > > page clean on dma_unmap_* with DMA_FROM_DEVICE like ia64 does) is up > > > to architectures. > > > > How does the above work ? IE, the dma unmap will flush the D side but > > not the I side ... or is the ia64 flush primitive magic enough to do > > both ? > > The point is that in a well regulated system, the I cache shouldn't need > extra flushing in the kernel. We should only be faulting in R-X pages. > If we're operating on RWX pages (i.e. self modifying code), it's the job > of userspace to keep I/D coherency. > > So the only case the kernel needs to worry about is the R-X fault case > for executable text code. Still, you do need to flush I when a page cache page is recycled. Cheers, Ben. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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