linux-kernel - Re: [PATCH v2] MTD: Fix Orion NAND driver compilation with ARM OABI

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Date:	Wed, 31 Mar 2010 15:01:12 +0300
From:	Paulius Zaleckas <paulius.zaleckas@...il.com>
To:	dwmw2@...radead.org
CC:	Nicolas Pitre <nico@...xnic.net>, akpm@...ux-foundation.org,
	u.kleine-koenig@...gutronix.de, simon.kagstrom@...insight.net,
	linux-mtd@...ts.infradead.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	jamie@...reable.org
Subject: Re: [PATCH v2] MTD: Fix Orion NAND driver compilation with ARM OABI

On 03/25/2010 06:26 PM, Nicolas Pitre wrote:
> On Thu, 25 Mar 2010, Paulius Zaleckas wrote:
>
>> We must tell GCC to use even register for variable passed
>> to ldrd instruction. Without this patch GCC 4.2.1 puts this
>> variable to r2/r3 on EABI and r3/r4 on OABI, so force it to
>> r2/r3. This does not change anything when EABI and OABI
>> compilation works OK.
>>
>> Without this patch and with OABI I get:
>>    CC      drivers/mtd/nand/orion_nand.o
>> /tmp/ccMkwOCs.s: Assembler messages:
>> /tmp/ccMkwOCs.s:63: Error: first destination register must be even -- `ldrd r3,[ip]'
>> make[5]: *** [drivers/mtd/nand/orion_nand.o] Error 1
>>
>> Signed-off-by: Paulius Zaleckas<paulius.zaleckas@...il.com>
>
> Acked-by: Nicolas Pitre<nico@...xnic.net>

David,

Will you take this patch?
Or you are waiting till I will add all Cc as Jamie suggested?

>
>> ---
>>
>>   drivers/mtd/nand/orion_nand.c |    8 +++++++-
>>   1 files changed, 7 insertions(+), 1 deletions(-)
>>
>> diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c
>> index f59c074..d60fc57 100644
>> --- a/drivers/mtd/nand/orion_nand.c
>> +++ b/drivers/mtd/nand/orion_nand.c
>> @@ -60,7 +60,13 @@ static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
>>   	}
>>   	buf64 = (uint64_t *)buf;
>>   	while (i<  len/8) {
>> -		uint64_t x;
>> +		/*
>> +		 * Since GCC has no proper constraint (PR 43518)
>> +		 * force x variable to r2/r3 registers as ldrd instruction
>> +		 * requires first register to be even.
>> +		 */
>> +		register uint64_t x asm ("r2");
>> +
>>   		asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
>>   		buf64[i++] = x;
>>   	}
>>

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