linux-kernel - [tip:perf/urgent] perf, x86: Enable Nehalem-EX support

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Date:	Tue, 6 Apr 2010 15:57:36 GMT
From:	tip-bot for Vince Weaver <vweaver1@...s.utk.edu>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, acme@...hat.com, paulus@...ba.org,
	hpa@...or.com, mingo@...hat.com, arjan@...ux.intel.com,
	a.p.zijlstra@...llo.nl, ming.m.lin@...el.com, tglx@...utronix.de,
	vweaver1@...s.utk.edu, mingo@...e.hu
Subject: [tip:perf/urgent] perf, x86: Enable Nehalem-EX support

Commit-ID:  134fbadf028a5977a1b06b0253d3ee33e6f0c642
Gitweb:     http://git.kernel.org/tip/134fbadf028a5977a1b06b0253d3ee33e6f0c642
Author:     Vince Weaver <vweaver1@...s.utk.edu>
AuthorDate: Tue, 6 Apr 2010 10:01:19 -0400
Committer:  Ingo Molnar <mingo@...e.hu>
CommitDate: Tue, 6 Apr 2010 17:52:59 +0200

perf, x86: Enable Nehalem-EX support

According to Intel Software Devel Manual Volume 3B, the
Nehalem-EX PMU is just like regular Nehalem (except for the
uncore support, which is completely different).

Signed-off-by:  Vince Weaver <vweaver1@...s.utk.edu>
Cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Paul Mackerras <paulus@...ba.org>
Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
Cc: "H. Peter Anvin" <hpa@...or.com>
Cc: Arjan van de Ven <arjan@...ux.intel.com>
Cc: Lin Ming <ming.m.lin@...el.com>
LKML-Reference: <alpine.DEB.2.00.1004060956580.1417@...20.eecs.utk.edu>
Signed-off-by: Ingo Molnar <mingo@...e.hu>
---
 arch/x86/kernel/cpu/perf_event_intel.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 84bfde6..9c794ac 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -936,6 +936,7 @@ static __init int intel_pmu_init(void)
 
 	case 26: /* 45 nm nehalem, "Bloomfield" */
 	case 30: /* 45 nm nehalem, "Lynnfield" */
+	case 46: /* 45 nm nehalem-ex, "Beckton" */
 		memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
 		       sizeof(hw_cache_event_ids));
 
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