linux-kernel - Re: [PATCH v3] ad7877: keep dma rx buffers in seperate cache lines

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Date:	Tue, 11 May 2010 16:34:14 -0400
From:	Mike Frysinger <vapier.adi@...il.com>
To:	Christoph Lameter <cl@...ux.com>,
	Pekka Enberg <penberg@...helsinki.fi>
Cc:	Matt Mackall <mpm@...enic.com>,
	Dmitry Torokhov <dmitry.torokhov@...il.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Oskar Schirmer <os@...ix.com>,
	Michael Hennerich <Michael.Hennerich@...log.com>,
	linux-input@...r.kernel.org, linux-kernel@...r.kernel.org,
	Daniel Glöckner <dg@...ix.com>,
	Oliver Schneidewind <osw@...ix.com>,
	Johannes Weiner <jw@...ix.com>, Nick Piggin <npiggin@...e.de>,
	David Rientjes <rientjes@...gle.com>,
	David Brownell <dbrownell@...rs.sourceforge.net>,
	Grant Likely <grant.likely@...retlab.ca>
Subject: Re: [PATCH v3] ad7877: keep dma rx buffers in seperate cache lines

On Tue, May 11, 2010 at 16:21, Christoph Lameter wrote:
> On Tue, 11 May 2010, Mike Frysinger wrote:
>> and like i said, that doesnt sound like a reasonable solution when
>> every single SPI driver (over 100 atm) out there is affected
>
> If you are on an embedded arch then you can of course set the default
> kmalloc alignment.
>
> The requirement for kmalloc is that it returns memory that can be used for
> DMA. If the arch can only DMA into cacheline aligned objects then the
> correct method is to force kmalloc alignment to cacheline size.

these are SPI drivers and are usable on any arch that supports a SPI
bus (which is pretty much every arch).  forget about "embedded"
arches.

the issue here is simple: a SPI driver (AD7877) needs to do a receive
SPI transfer into a DMA safe buffer.  what is the exact API to
dynamically allocate memory for the structure with this buffer
embedded in it such that the start of the structure is cached aligned
?  creating a dedicated kmem cache may work, but it isnt a scalable
solution if every SPI driver needs to create its own cache.

On Tue, May 11, 2010 at 16:22, Pekka Enberg wrote:
> Why do you need to do it in every driver? Why not create a cache of
> size cache_line_size()*2 or something in the SPI stack and add a
> helper function spi_alloc_whatever_this_is_about() for the drivers to
> use?

that is a question for David/Grant.  i'm not the SPI core maintainer,
i'm merely watching over some SPI drivers.  however, this answer also
doesnt sound like it's thinking big enough because what you're
proposing isnt specific to the SPI bus -- any time a DMA safe buffer
is needed dynamically, this function could be used.
-mike
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