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Date: Sat, 10 Jul 2010 19:20:57 -0600 From: Robert Hancock <hancockrwd@...il.com> To: Bryan Hundven <bryanhundven@...il.com> Cc: linux-kernel@...r.kernel.org, mchehab@...hat.com Subject: Re: Interrupt Affinity in SMP On Sat, Jul 10, 2010 at 1:46 PM, Bryan Hundven <bryanhundven@...il.com> wrote: > I was able to set eth0 and it's TxRx queues to cpu1, but it is my > understanding that 0xFFFFFFFF should distribute the interrupts across all > cpus, much like LOC in my output of /proc/interrupts. > > I don't have access to the computer this weekend, but I will provide more > info on Monday. That may be chipset dependent, I don't think all chipsets have the ability to distribute the interrupts like that. Round-robin interrupt distribution for a given handler isn't optimal for performance anyway since it causes the relevant cache lines for the interrupt handler to be ping-ponged between the different CPUs. > > -bryan > > On Jul 9, 2010 5:48 PM, "Robert Hancock" <hancockrwd@...il.com> wrote: > > On 07/09/2010 04:59 PM, Bryan Hundven wrote: >> >> Mauro, list, >> >> (please CC me in replies, I am not... > > Tried changing these files to exclude CPU0? > > Have you tried running the irqbalance daemon? That's what you likely want to > be doing anyway.. > >> =====8<=====8<=====8<=====8<=====8<=====8<=====8<=====8<=====8<===== >> >> =====8<=====8<=====8<==... -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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