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Date: Tue, 17 Aug 2010 19:47:04 +0200 From: Michael Guntsche <mike@...loops.com> To: Brian Norris <norris@...adcom.com> Cc: "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org> Subject: Re: [BUG] Nand support broken with v2.6.36-rc1 On 17 Aug 10 10:00, Brian Norris wrote: > One of the following two cases is likely the problem: > (1) Your chip is supposed to use offset 0, not 5, for the BBM (i.e., > NAND_LARGE_BADBLOCK_POS, not NAND_SMALL_BADBLOCK_POS), and so your > ecclayout should not be leaving byte 0 in the "oobfree" array (a > design flaw since you first began using this chip) First, I am just an end user so I have no access to the datasheets etc. I just got the code from the board manufactrurer (2.6.27) and forward port it to recent kernels. The reason I am using a specific layout is because the bootloader on this board expects it this way. It formats it this way in the beginning and I cannot change that. > Could you send the full NAND ID string (8 bytes, not If you can tell me where I can find that I'll be more than happy to send it to you. But as I said I think the reason for this is this special bootloader. Please tell me, if you need more informations. Kind regards, Michael -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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