linux-kernel - Re: [PATCH 0/2] perf_events: add support for Intel fixed counter 2

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Date:	Sat, 5 Feb 2011 16:19:36 +0100
From:	Stephane Eranian <eranian@...gle.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	linux-kernel@...r.kernel.org, mingo@...e.hu, paulus@...ba.org,
	davem@...emloft.net, fweisbec@...il.com,
	perfmon2-devel@...ts.sf.net, eranian@...il.com,
	robert.richter@....com, acme@...hat.com, gorcunov@...il.com,
	ming.m.lin@...el.com
Subject: Re: [PATCH 0/2] perf_events: add support for Intel fixed counter 2

Hi,

Ok, another, easier, choice would be to use event code 0 (and
umaks 0x1 for instance). I doubt that one will ever be used.


On Fri, Feb 4, 2011 at 2:19 PM, Stephane Eranian <eranian@...gle.com> wrote:
> On Fri, Feb 4, 2011 at 2:12 PM, Peter Zijlstra <peterz@...radead.org> wrote:
>> On Fri, 2011-02-04 at 14:00 +0200, Stephane Eranian wrote:
>>
>>> This series of patches solves this problem by introducing a custom
>>> encoding for UNHALTED_REFERENCE_CYCLES (0xff3c) and improving
>>> the constraint infrastructure to handle events which can ONLY be
>>> measured on fixed counters.
>>
>> Right, so the only problem I can see with this is that Intel will at
>> some point in the future put an actual event there.
>>
> I doubt that but I will check with them.
>
> The alternative I thought about would be to use a bit in the upper 32
> bit section
> of attr.config and use the constraint->cmask to catch it. That would
> be a special
> cmask. That would probably work because ALL events have to go through
> get_constraints().
>
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