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Open Source and information security mailing list archives
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Date: Mon, 14 Feb 2011 13:46:00 -0800 (PST) From: David Miller <davem@...emloft.net> To: rostedt@...dmis.org Cc: peterz@...radead.org, will.newton@...il.com, jbaron@...hat.com, mathieu.desnoyers@...ymtl.ca, hpa@...or.com, mingo@...e.hu, tglx@...utronix.de, andi@...stfloor.org, roland@...hat.com, rth@...hat.com, masami.hiramatsu.pt@...achi.com, fweisbec@...il.com, avi@...hat.com, sam@...nborg.org, ddaney@...iumnetworks.com, michael@...erman.id.au, linux-kernel@...r.kernel.org, vapier@...too.org, cmetcalf@...era.com, dhowells@...hat.com, schwidefsky@...ibm.com, heiko.carstens@...ibm.com, benh@...nel.crashing.org Subject: Re: [PATCH 0/2] jump label: 2.6.38 updates From: Steven Rostedt <rostedt@...dmis.org> Date: Mon, 14 Feb 2011 16:39:36 -0500 > Thus it is not about global, as global is updated by normal means and > will update the caches. atomic_t is updated via the ll/sc that ignores > the cache and causes all this to break down. IOW... broken hardware ;) I don't see how cache coherency can possibly work if the hardware behaves this way. In cache aliasing situations, yes I can understand a L1 cache visibility issue being present, but with kernel only stuff that should never happen otherwise we have a bug in the arch cache flushing support. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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