linux-kernel - Re: [PATCH] msm: gpio-v2: Add missing BIT field macros for interrupt control

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Date:	Thu, 10 Mar 2011 12:37:59 -0800
From:	David Brown <davidb@...eaurora.org>
To:	Rohit Vaswani <rvaswani@...eaurora.org>
Cc:	bryanh@...eaurora.org, linux@....linux.org.uk, dwalker@...o99.com,
	dima@...roid.com, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH] msm: gpio-v2: Add missing BIT field macros for interrupt control

On Mon, Mar 07 2011, Rohit Vaswani wrote:

> The gpio-v2 file was missing the BIT field macros causing incorrect
> values to be written at incorrect offsets within the TLMM block registers.
> These registers are used for masking/unmasking interrupts and configuring them
> This change fixes that problem.
>
> Change-Id: Ib538a2d09bca039b058627ddc309a7faaaf6bc8d
> Signed-off-by: Rohit Vaswani <rvaswani@...eaurora.org>

Please remember to remove these Change-Id lines from patches before
sending them out.  I'll remove them from these patches, since there
don't seem to be any other comments.

Thanks,
David

-- 
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
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