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Date:	Fri, 17 Jun 2011 11:32:19 -0700
From:	Eric Anholt <eric@...olt.net>
To:	linux-kernel@...r.kernel.org
Cc:	Dave Airlie <airlied@...hat.com>,
	Daniel J Blueman <daniel.blueman@...il.com>,
	stable@...nel.org, Eric Anholt <eric@...olt.net>
Subject: [PATCH] drm/i915: Fix gen6 (SNB) missed BLT ring interrupts.

From: Daniel J Blueman <daniel.blueman@...il.com>

The failure appeared in dmesg as:

[drm:i915_hangcheck_ring_idle] *ERROR* Hangcheck timer elapsed... blt
ring idle [waiting on 35064155, at 35064155], missed IRQ?

This works around that problem on by making the blitter command
streamer write interrupt state to the Hardware Status Page when a
MI_USER_INTERRUPT command is decoded, which appears to force the seqno
out to memory before the interrupt happens.

v1->v2: Moved to prior interrupt handler installation and RMW flags as
per feedback.
v2->v3: Removed RMW of flags (by anholt)

Cc: stable@...nel.org
Signed-off-by: Daniel J Blueman <daniel.blueman@...il.com>
Signed-off-by: Eric Anholt <eric@...olt.net>
Tested-by: Chris Wilson <chris@...is-wilson.co.uk> [v1]
Tested-by: Eric Anholt <eric@...olt.net> [v1,v3]
	   (incidence of the bug with a testcase went from avg 2/1000 to
	   0/12651 in the latest test run (plus more for v1))
Tested-by: Kenneth Graunke <kenneth@...tecape.org> [v1]
Tested-by: Robert Hooker <robert.hooker@...onical.com> [v1]
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=33394
---
 drivers/gpu/drm/i915/i915_irq.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b79619a..0263717 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1740,6 +1740,16 @@ void ironlake_irq_preinstall(struct drm_device *dev)
 		INIT_WORK(&dev_priv->rps_work, gen6_pm_rps_work);
 
 	I915_WRITE(HWSTAM, 0xeffe);
+	if (IS_GEN6(dev)) {
+		/* Workaround stalls observed on Sandy Bridge GPUs by
+		 * making the blitter command streamer generate a
+		 * write to the Hardware Status Page for
+		 * MI_USER_INTERRUPT.  This appears to serialize the
+		 * previous seqno write out before the interrupt
+		 * happens.
+		 */
+		I915_WRITE(GEN6_BLITTER_HWSTAM, ~GEN6_BLITTER_USER_INTERRUPT);
+	}
 
 	/* XXX hotplug from PCH */
 
-- 
1.7.5.3

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