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Date: Tue, 19 Jul 2011 11:23:51 +1000 From: Tony Breeds <tony@...eyournoodle.com> To: Ayman El-Khashab <ayman@...hashab.com> Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>, Paul Mackerras <paulus@...ba.org>, linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org Subject: Re: [v2 PATCH 1/1] powerpc/4xx: enable and fix pcie gen1/gen2 on the 460sx On Mon, Jul 18, 2011 at 08:31:01AM -0500, Ayman El-Khashab wrote: > Yes, but I think that is correct for it to be "1". The data > sheets for these parts that I checked had bit 1 marked as > reserved. Only OMR1MSKL and OMR3MSKL had extra definitions > such as the _IO and _UOT. The parts I checked which were > the sheets for the EX and SX (which cover another 6 or 7 > parts) all had it with just a single bit defined on that > register. Ahh okay. I kind of think that this may need to be a seperate change. At the very least it needs to be explicitly mentioned in the change log. Yours Tony -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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