linux-kernel - Re: [PATCH 07/12] perf_events: add LBR software filter support for Intel X86

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Date:	Mon, 10 Oct 2011 23:05:33 +0900
From:	Masami Hiramatsu <masami.hiramatsu.pt@...achi.com>
To:	Ingo Molnar <mingo@...e.hu>
Cc:	Peter Zijlstra <peterz@...radead.org>,
	Stephane Eranian <eranian@...gle.com>,
	Andi Kleen <andi@...stfloor.org>, linux-kernel@...r.kernel.org,
	acme@...hat.com, ming.m.lin@...el.com, robert.richter@....com,
	ravitillo@....gov
Subject: Re: [PATCH 07/12] perf_events: add LBR software filter support for
 Intel X86

(2011/10/10 15:09), Ingo Molnar wrote:
> 
> * Masami Hiramatsu <masami.hiramatsu.pt@...achi.com> wrote:
> 
>> (2011/10/07 20:21), Peter Zijlstra wrote:
>>> On Fri, 2011-10-07 at 13:18 +0200, Peter Zijlstra wrote:
>>>>> Yeah, depending on the depth of the LBR. But then what happens, you
>>>>> decode an instruction that is not what was executed. 
>>>>
>>>> Right, and Andi's concern is that this might cause our instruction
>>>> decoder to blow up, or worse. 
>>>
>>> That is, we have a fair confidence that its capable of correctly
>>> decoding correct streams, but I understood from Masami that they haven't
>>> actually tried feeding it crap.
>>
>> OK, I'll do hardening it.
> 
> Yes, that's a good idea. Could you perhaps add it to the existing 
> build time sanity test we do for the instruction decoder, to feed it 
> a sequence of /dev/urandom input or such?

Ah, nice. Maybe we need another test binary, since current one is
just ensuring the output of objdump and decoder is same.
anyway it's not so difficult if it feeds random binaries to
ensure the decoder doesn't access bad address.

Thank you,

-- 
Masami HIRAMATSU
Software Platform Research Dept. Linux Technology Center
Hitachi, Ltd., Yokohama Research Laboratory
E-mail: masami.hiramatsu.pt@...achi.com
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