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Message-ID: <1320773518.19116.30.camel@bling.home>
Date: Tue, 08 Nov 2011 10:31:58 -0700
From: Alex Williamson <alex.williamson@...hat.com>
To: "Roedel, Joerg" <Joerg.Roedel@....com>
Cc: "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"jbarnes@...tuousgeek.org" <jbarnes@...tuousgeek.org>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>
Subject: Re: [PATCH] pci: More PRI/PASID cleanup
On Tue, 2011-11-08 at 18:17 +0100, Roedel, Joerg wrote:
> On Tue, Nov 08, 2011 at 09:44:30AM -0700, Alex Williamson wrote:
>
> > bit 0 (PCI_PASID_ENABLE) is reserved in the CAP register...
>
> Is it? Which spec are you using? In my version it is not reserved but
> states if it is supported to set the enable-bit.
Latest I can find is the March 31, 2011 PASID ECN, which just lists that
bit as reserved.
> > Which means we need to check CTRL, not CAP to see if it was previously
> > enabled... or maybe this check is entirely wrong and we're was trying to
> > see if enable is supported.
>
> I will check how this looks in my test environment.
>
> > And nobody exposes PCI_PASID_ENABLE because it doesn't exist as a
> > capability.
> >
> > It's easy to see this if the bit definitions are named appropriately and
> > specified per register instead of being lumped together as "close
> > enough". Thanks,
>
> I don't object against your renames as long as it doesn't cause
> merge-conflicts with what I plan to send upstream.
I can drop it if need be, was just trying to do some cleanup on the
consistency of pci_reg.h before adding a bunch more defines to help
bounds checking and parsing for vfio-pci. Unless my spec is outdated,
it seems like there's more than an aesthetic change here though, so
resolving the conflicts with your latest work might be warranted.
Thanks,
Alex
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