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Date: Fri, 11 Nov 2011 17:30:01 -0800 From: Roland Dreier <roland@...estorage.com> To: Chris Wright <chrisw@...s-sol.org> Cc: David Woodhouse <dwmw2@...radead.org>, Alex Williamson <alex.williamson@...hat.com>, iommu@...ts.linux-foundation.org, linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org, ddutile@...hat.com Subject: Re: [PATCH] intel-iommu: Default to non-coherent for domains unattached to iommus On Fri, Nov 11, 2011 at 5:08 PM, Chris Wright <chrisw@...s-sol.org> wrote: >> I would be more inclined to suspect that there's some >> chipset buffering that we aren't correctly flushing (which might in >> itself be a hardware issue, since the way to flush the cache is supposed >> to be well-defined). > > Roland, have you tried switching BIOS to Coherency On and can do you > ever see stale PTEs? Yeah, the problems go away if I turn on coherency. More details here: https://lkml.org/lkml/2011/10/11/412 (and after that email, I let the box run long enough that I'm pretty sure turning VT-d coherency on does fix things) I'd love to fix this but not sure how much I can contribute beyond tests (I don't see anything wrong in the VT-d cache flushing code in the kernel, and I did look for a while). - R. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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