lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Wed, 16 Nov 2011 17:34:33 +0100
From:	Lars-Peter Clausen <lars@...afoo.de>
To:	Mark Brown <broonie@...nsource.wolfsonmicro.com>
CC:	Dimitris Papastamos <dp@...nsource.wolfsonmicro.com>,
	Jonathan Cameron <jic23@...nel.org>,
	Michael Hennerich <michael.hennerich@...log.com>,
	linux-kernel@...r.kernel.org, linux-iio@...r.kernel.org,
	device-drivers-devel@...ckfin.uclinux.org, drivers@...log.com
Subject: Re: [PATCH 5/7] regmap: Check if a register is writable instead of
 readable in regcache_read

On 11/16/2011 05:16 PM, Mark Brown wrote:
> On Wed, Nov 16, 2011 at 04:28:20PM +0100, Lars-Peter Clausen wrote:
> 
>> Currently regcache checks whether a register is readable when performing a
>> cached read and returns an error if not. Change this check to test whether the
>> register is writable. This makes more sense, since reading from the cache when
>> the register is not readable allows the operation described above, but if the
>> register is not writable there shouldn't  be a value for it in the cache anyway.
> 
> This logic doesn't entirely follow - one can have registers which are
> volatile but could be read once at startup.  Plus...

Hm? The use case here is chips which do not support readback. So we never
want to fallback to a hardware read but still want to be able to do a cached
read.

> 
>> @@ -206,7 +206,7 @@ int regcache_read(struct regmap *map,
>>  
>>  	BUG_ON(!map->cache_ops);
>>  
>> -	if (!regmap_readable(map, reg))
>> +	if (!regmap_writeable(map, reg))
>>  		return -EIO;
> 
> ...the code winds up just looking like an obvious bug.

Why? If a register is not writable we won't have anything in the cache for
it. So reading from the cache for a register which is not writable doesn't
make any sense.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ