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Date:	Mon, 21 Nov 2011 20:18:10 +0100
From:	Peter Zijlstra <a.p.zijlstra@...llo.nl>
To:	Will Deacon <will.deacon@....com>
Cc:	"mingo@...e.hu" <mingo@...e.hu>, William Cohen <wcohen@...hat.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Michael Cree <mcree@...on.net.nz>,
	Deng-Cheng Zhu <dengcheng.zhu@...il.com>,
	Anton Blanchard <anton@...ba.org>,
	Eric B Munson <emunson@...bm.net>,
	Heiko Carstens <heiko.carstens@...ibm.com>,
	Paul Mundt <lethal@...ux-sh.org>,
	"David S. Miller" <davem@...emloft.net>,
	Richard Kuo <rkuo@...eaurora.org>,
	Stephane Eranian <eranian@...gle.com>,
	Arun Sharma <asharma@...com>, Vince Weaver <vince@...ter.net>
Subject: Re: [RFC][PATCH 2/6] perf, arch: Rework perf_event_index()

On Mon, 2011-11-21 at 17:23 +0000, Will Deacon wrote:
> Hi Peter,
> 
> On Mon, Nov 21, 2011 at 02:51:16PM +0000, Peter Zijlstra wrote:
> > Put the logic to compute the event index into a per pmu method. This
> > is required because the x86 rules are weird and wonderful and don't
> > match the capabilities of the current scheme.
> > 
> > AFAIK only powerpc actually has a usable userspace read of the PMCs
> > but I'm not at all sure anybody actually used that.
> > 
> > ARM looks like it cared, but I really wouldn't know, Will?
> 
> It used to care, but it doesn't anymore. Feel free to make the offset 0 and
> use the (now) generic codepath.
> 
> With that:
> 
> Acked-by: Will Deacon <will.deacon@....com>


But does ARM have a read PMU counter from userspace
instruction/capability?

Lacking that its all moot of course. If it does, it would be nice to
have an ARM version of patch 6.
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