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Date:	Tue, 22 Nov 2011 08:47:27 +0200
From:	Mika Westerberg <mika.westerberg@....fi>
To:	Rafal Prylowski <prylowski@...asoft.pl>
Cc:	linux-arm-kernel@...ts.infradead.org, rmallon@...il.com,
	vinod.koul@...el.com, broonie@...nsource.wolfsonmicro.com,
	linux-kernel@...r.kernel.org, grant.likely@...retlab.ca,
	hsweeten@...ionengravers.com, dan.j.williams@...el.com, lrg@...com
Subject: Re: [PATCH v2 1/5] dmaengine: add ep93xx DMA support

On Mon, Nov 21, 2011 at 09:54:29AM +0100, Rafal Prylowski wrote:
> 
> This patch works partially for me. Drive is detected correctly, I can do simple test with
> hdparm, mount partitions, create file with 'touch' command, but when trying to fill
> partition with data I get:
> 
> # dd if=/dev/zero of=/mnt/b/zero4 bs=4M
> Internal error: Oops - undefined instruction: 0 [#1]

Right. It still should call ep93xx_dma_advance_work(). Like the patch below.

Let me know if this works for you. Basically it's the patch from you except
that we use a flag to indicate if the channel is running or not.

I would like to keep it this way (given that it solves the crash you are
seeing, that is) to make sure that we can expect that the active list is never
empty when the channel is operating.

diff --git a/drivers/dma/ep93xx_dma.c b/drivers/dma/ep93xx_dma.c
index 6181811..2670005 100644
--- a/drivers/dma/ep93xx_dma.c
+++ b/drivers/dma/ep93xx_dma.c
@@ -155,6 +155,8 @@ struct ep93xx_dma_chan {
 	unsigned long			flags;
 /* Channel is configured for cyclic transfers */
 #define EP93XX_DMA_IS_CYCLIC		0
+/* Channel is enabled */
+#define EP93XX_DMA_IS_RUNNING		1
 
 	int				buffer;
 	dma_cookie_t			last_completed;
@@ -669,24 +671,25 @@ static void ep93xx_dma_tasklet(unsigned long data)
 {
 	struct ep93xx_dma_chan *edmac = (struct ep93xx_dma_chan *)data;
 	struct ep93xx_dma_desc *desc, *d;
-	dma_async_tx_callback callback;
-	void *callback_param;
+	dma_async_tx_callback callback = NULL;
+	void *callback_param = NULL;
 	LIST_HEAD(list);
 
 	spin_lock_irq(&edmac->lock);
-	desc = ep93xx_dma_get_active(edmac);
-	if (desc->complete) {
-		edmac->last_completed = desc->txd.cookie;
-		list_splice_init(&edmac->active, &list);
+	if (test_bit(EP93XX_DMA_IS_RUNNING, &edmac->flags)) {
+		desc = ep93xx_dma_get_active(edmac);
+		if (desc->complete) {
+			edmac->last_completed = desc->txd.cookie;
+			list_splice_init(&edmac->active, &list);
+		}
+		callback = desc->txd.callback;
+		callback_param = desc->txd.callback_param;
 	}
 	spin_unlock_irq(&edmac->lock);
 
 	/* Pick up the next descriptor from the queue */
 	ep93xx_dma_advance_work(edmac);
 
-	callback = desc->txd.callback;
-	callback_param = desc->txd.callback_param;
-
 	/* Now we can release all the chained descriptors */
 	list_for_each_entry_safe(desc, d, &list, node) {
 		/*
@@ -758,6 +761,8 @@ static dma_cookie_t ep93xx_dma_tx_submit(struct dma_async_tx_descriptor *tx)
 	edmac->chan.cookie = cookie;
 	desc->txd.cookie = cookie;
 
+	set_bit(EP93XX_DMA_IS_RUNNING, &edmac->flags);
+
 	/*
 	 * If nothing is currently prosessed, we push this descriptor
 	 * directly to the hardware. Otherwise we put the descriptor
@@ -1106,6 +1111,7 @@ static int ep93xx_dma_terminate_all(struct ep93xx_dma_chan *edmac)
 	spin_lock_irqsave(&edmac->lock, flags);
 	/* First we disable and flush the DMA channel */
 	edmac->edma->hw_shutdown(edmac);
+	clear_bit(EP93XX_DMA_IS_RUNNING, &edmac->flags);
 	clear_bit(EP93XX_DMA_IS_CYCLIC, &edmac->flags);
 	list_splice_init(&edmac->active, &list);
 	list_splice_init(&edmac->queue, &list);
--
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