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Date:	Tue, 22 Nov 2011 11:47:00 +0000
From:	Will Deacon <will.deacon@....com>
To:	Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc:	"mingo@...e.hu" <mingo@...e.hu>, William Cohen <wcohen@...hat.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Michael Cree <mcree@...on.net.nz>,
	Deng-Cheng Zhu <dengcheng.zhu@...il.com>,
	Anton Blanchard <anton@...ba.org>,
	Eric B Munson <emunson@...bm.net>,
	Heiko Carstens <heiko.carstens@...ibm.com>,
	Paul Mundt <lethal@...ux-sh.org>,
	"David S. Miller" <davem@...emloft.net>,
	Richard Kuo <rkuo@...eaurora.org>,
	Stephane Eranian <eranian@...gle.com>,
	Arun Sharma <asharma@...com>, Vince Weaver <vince@...ter.net>,
	"ostrikov@...dia.com" <ostrikov@...dia.com>
Subject: Re: [RFC][PATCH 2/6] perf, arch: Rework perf_event_index()

On Tue, Nov 22, 2011 at 11:26:20AM +0000, Peter Zijlstra wrote:
> On Mon, 2011-11-21 at 22:43 +0000, Will Deacon wrote:
> > Perhaps we could disable it while per-cpu events are running, although I
> > think this will probably just lead to SIGILL central for anybody trying to
> > use the counters in userspace.
> 
> One possibility would be to do as I did in patch 4, except ARM has it
> disabled by default and the folks who think they know WTF they're doing
> can enable it or so.

The problem is that everybody thinks they know WTF they're doing!

> Ostrikov mentioned on #kernelnewbies he wanted to have this enabled
> because apparently games use it. He mentioned toggling the user access
> on/off depending on if the kernel was using perf or not, but that would
> create very unreliable service.

Well we already have a reserve/release PMU thing which perf honours so we
could conceivably do this. I still reckon this will just lead to SIGILLs in
userspace though because we can't sanely notify tasks that they should leave
the PMU alone for a bit.

> Best would be to use perf to program the thing and use the userspace
> read and simply agree not to write to these registers (and pray people
> don't)..

But you know that the first thing people will do is zero the registers.

> Also, for those ARMs that do have a user readable clock, you could
> support the new time_{mult,shift,offset} from patch 5.

The user-readable clock will first appear in Cortex-A15, so the code for
that still needs to hit mainline before I can look at doing this in perf.

Will
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