linux-kernel - Re: [PATCH v3 3/5] clk: introduce the common clock framework

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Date:	Thu, 1 Dec 2011 10:25:57 -0800
From:	"Turquette, Mike" <mturquette@...com>
To:	Mark Brown <broonie@...nsource.wolfsonmicro.com>
Cc:	Paul Walmsley <paul@...an.com>, linux@....linux.org.uk,
	linus.walleij@...ricsson.com, patches@...aro.org,
	shawn.guo@...escale.com, magnus.damm@...il.com,
	linux-kernel@...r.kernel.org, amit.kucheria@...aro.org,
	richard.zhao@...aro.org, grant.likely@...retlab.ca,
	dsaxena@...aro.org, eric.miao@...aro.org, sboyd@...cinc.com,
	skannan@...cinc.com, linaro-dev@...ts.linaro.org,
	jeremy.kerr@...onical.com, linux-omap@...r.kernel.org,
	tglx@...utronix.de, linux-arm-kernel@...ts.infradead.org,
	arnd.bergmann@...aro.org
Subject: Re: [PATCH v3 3/5] clk: introduce the common clock framework

On Thu, Dec 1, 2011 at 6:42 AM, Mark Brown
<broonie@...nsource.wolfsonmicro.com> wrote:
> On Wed, Nov 30, 2011 at 11:39:59PM -0700, Paul Walmsley wrote:
>
>> Clock rate/parent-change notifiers are requirements for DVFS use-cases,
>> and they must be paired with something like the
>> clk_{allow,block}_rate_change() functions to work efficiently.  I intend
>> to comment on this later; it's not a simple problem.  It might be worth
>> noting that Tero and I implemented a simplified version of this for the
>> N900.
>
> I'm thinking that if we're going to have clk_{allow,block}_rate_change()
> we may as well make that the main interface to enable rate changes - if
> a device wants to change the clock rate it allows rate changes using
> that interface rather than by disabling the clocks.  I've got devices
> which can do glitch free updates of active clocks so having to disable
> would be a real restriction, and cpufreq would have issues with actually
> disabling the clock too I expect.
>

I agree that imposing a "disable clk before changing rate" policy in
the framework core is a bad idea.  During discussion on the
CLK_GATE_SET_RATE flag in the patch #2 Shawn commented that he has
some clks that must be enabled to change their rates (I assume he
means PLLs but that detail doesn't really matter).

Regards,
Mike
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