lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Mon, 9 Jan 2012 21:25:12 +0800
From:	Eric Miao <eric.miao@...aro.org>
To:	Russell King - ARM Linux <linux@....linux.org.uk>
Cc:	Richard Zhao <richard.zhao@...aro.org>, patches@...aro.org,
	vinod.koul@...el.com, linux-kernel@...r.kernel.org,
	kernel@...gutronix.de, dan.j.williams@...el.com,
	shawn.guo@...aro.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v4 2/2] dma/imx-sdma: convert _raw_readl/_raw_writel to readl/writel

On Mon, Jan 9, 2012 at 7:51 PM, Russell King - ARM Linux
<linux@....linux.org.uk> wrote:
> On Sun, Jan 08, 2012 at 10:44:22PM +0800, Richard Zhao wrote:
>> readl/writel is more genric. And if CONFIG_ARM_DMA_MEM_BUFFERABLE,
>> they includes necessary memory barriers.
>
> In a DMA engine driver, you need to use the barrier accessors when:
>
> 1. You finally enable the DMA engine to perform a transfer.
>   The included barrier ensures that writes to the descriptors are visible
>   to the DMA engine.
>
> 2. You read from a status register before examining the descriptors.
>   This ensures that the descriptor accesses won't be ordered before the
>   status register read.
>
> Provided other accesses are within the same 1K region, the remainder of
> them do not have to be the strictly ordered accessors, and you can use
> the _relaxed variants (but only in ARM specific drivers.)

Russell,

Does this also mean when endian conversion is not necessary, the __raw_*
version will be better here? Or generally the _relaxed variants are more
recommended as endian conversion will be optimized away anyway with
these AMBA accesses as both sides are little-endian?

>
> So, if your DMA engine has a control register, and a descriptor pointer
> register, you can write the descriptor pointer register with a
> writel_relaxed().  When you write the control register to enable the
> transfer, use writel() to ensure there's a barrier so the descriptors
> are visible.
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ