linux-kernel - [PATCH -tip v5 2/5] perf: set correct value to perf_event

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Date:	Mon, 30 Jan 2012 13:43:03 +0900
From:	Akihiro Nagai <akihiro.nagai.hw@...achi.com>
To:	Arnaldo Carvalho de Melo <acme@...radead.org>,
	Ingo Molnar <mingo@...e.hu>,
	Peter Zijlstra <peterz@...radead.org>,
	Frederic Weisbecker <fweisbec@...il.com>,
	David Ahern <dsahern@...il.com>
Cc:	linux-kernel@...r.kernel.org,
	Masami Hiramatsu <masami.hiramatsu.pt@...achi.com>,
	yrl.pp-manager.tt@...achi.com,
	Akihiro Nagai <akihiro.nagai.hw@...achi.com>,
	Peter Zijlstra <peterz@...radead.org>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Paul Mackerras <paulus@...ba.org>, Ingo Molnar <mingo@...e.hu>,
	Arnaldo Carvalho de Melo <acme@...radead.org>,
	David Ahern <dsahern@...il.com>,
	Masami Hiramatsu <masami.hiramatsu.pt@...achi.com>
Subject: [PATCH -tip v5 2/5] perf: set correct value to perf_event_header.misc
 for BTS

Set correct value to perf_event_headder.misc of BTS record
to resolve symbols and DSOs correctly by user-space tools.

Changes in v4:
 - Add check routine to set correct value

Signed-off-by: Akihiro Nagai <akihiro.nagai.hw@...achi.com>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Frederic Weisbecker <fweisbec@...il.com>
Cc: Paul Mackerras <paulus@...ba.org>
Cc: Ingo Molnar <mingo@...e.hu>
Cc: Arnaldo Carvalho de Melo <acme@...radead.org>
Cc: David Ahern <dsahern@...il.com>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@...achi.com>
---

 arch/x86/kernel/cpu/perf_event_intel_ds.c |   31 +++++++++++++++++++----------
 1 files changed, 20 insertions(+), 11 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index 73da6b6..2f99597 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -285,6 +285,18 @@ void intel_pmu_disable_bts(void)
 	update_debugctlmsr(debugctlmsr);
 }
 
+
+#include <asm/insn.h>
+
+static inline bool kernel_ip(unsigned long ip)
+{
+#ifdef CONFIG_X86_32
+	return ip > PAGE_OFFSET;
+#else
+	return (long)ip < 0;
+#endif
+}
+
 int intel_pmu_drain_bts_buffer(void)
 {
 	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
@@ -330,6 +342,14 @@ int intel_pmu_drain_bts_buffer(void)
 		return 1;
 
 	for (; at < top; at++) {
+		/*
+		 * To resolve user space symbols and DSOs correctly, set
+		 * PERF_RECORD_MISC_USER if from_addr or to_addr is user space.
+		 */
+		if (!kernel_ip(data.ip) || !kernel_ip(data.addr)) {
+			header.misc &= ~PERF_RECORD_MISC_CPUMODE_MASK;
+			header.misc |= PERF_RECORD_MISC_USER;
+		}
 		data.ip		= at->from;
 		data.addr	= at->to;
 
@@ -476,17 +496,6 @@ void intel_pmu_pebs_disable_all(void)
 		wrmsrl(MSR_IA32_PEBS_ENABLE, 0);
 }
 
-#include <asm/insn.h>
-
-static inline bool kernel_ip(unsigned long ip)
-{
-#ifdef CONFIG_X86_32
-	return ip > PAGE_OFFSET;
-#else
-	return (long)ip < 0;
-#endif
-}
-
 static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
 {
 	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);

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