linux-kernel - Re: [PATCH v2 0/2] Add Qualcomm MSM ADM DMAEngine driver

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Date:	Wed, 01 Feb 2012 14:38:59 +0530
From:	Ravi Kumar V <kumarrav@...eaurora.org>
To:	Vinod Koul <vinod.koul@...el.com>
CC:	linux-arm-kernel@...ts.infradead.org, davidb@...eaurora.org,
	dan.j.williams@...el.com, Daniel Walker <dwalker@...o99.com>,
	johlstei@...eaurora.org, bryanh@...eaurora.org,
	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
	arnd@...db.de, tsoni@...eaurora.org, linux@....linux.org.uk
Subject: Re: [PATCH v2 0/2] Add Qualcomm MSM ADM DMAEngine driver

On 2/1/2012 2:16 PM, Vinod Koul wrote:
> On Wed, 2012-02-01 at 14:07 +0530, Ravi Kumar V wrote:
>> Our hardware supports single transfer mode,scatter gather mode&  box
>> mode.
>>
>> we are using these dmaengine API's for our HW
>> device_prep_memcpy() for single mode.
>> device_prep_dma_sg() for sg mode.
>> device_prep_interleaved_dma() for box mode.
>>
>> We need to pass command configuration parameter to all of the above
>> three modes and it can be possible if extra context parameter is added
>> into these API's
> but again, is this static fr channel for each transfer. Would you be
> able to derive these for non box modes?
>

Command configuration parameter has this information which is used be our HW
1.Device Id for Synchronization & acknowledgment with slow clock devices.
2.Endian type.
3.Blocking/unblocking channel after/before transfer.

Command configuration parameter should be passed in all the three modes 
and per transfer so this parameter is dynamic keep changing for each 
transfer.

-- 
Sent by a consultant of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
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