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Date:	Mon, 16 Apr 2012 14:11:04 +0200
From:	Peter Zijlstra <a.p.zijlstra@...llo.nl>
To:	"Yan, Zheng" <zheng.z.yan@...el.com>
Cc:	mingo@...e.hu, andi@...stfloor.org, eranian@...gle.com,
	linux-kernel@...r.kernel.org, ming.m.lin@...el.com
Subject: Re: [PATCH 2/5] perf: generic intel uncore support

On Tue, 2012-04-10 at 08:48 +0800, Yan, Zheng wrote:
> On 04/03/2012 10:29 PM, Peter Zijlstra wrote:
> > On Tue, 2012-04-03 at 16:28 +0800, Yan, Zheng wrote:
> >> On 04/03/2012 06:11 AM, Peter Zijlstra wrote:
> >>> On Sun, 2012-04-01 at 11:11 +0800, Yan, Zheng wrote:
> >>>>
> >>>> Because using per-cpu allocation is inconvenience for PCI uncore device.
> >>>
> >>> What are those, where does one read about them and why?
> >>>
> >> PCI uncore device support was added by patch 4. If using per-cpu pointer,
> >> we have to setup the per-cpu pointer after the PCI driver's probe function
> >> recognizes the uncore device. It means we have to first add the PCI uncore
> >> device to a list, then call a function on all cpus to scan the list, find
> >> the right uncore device and setup the per-cpu pointer.
> > 
> > Yeah, I saw that, but it was all completely lacking in where one can
> > find actual detail on that stuff. What parts of the SDM do I read? Is
> > there anything other than the SDM, etc..
> > 
> The uncore performance monitoring guide:
> 
> http://www.intel.com/content/dam/www/public/us/en/documents/design-guides/xeon-e5-2600-uncore-guide.pdf

Thanks,.. ok so I don't see what the problem for PCI is. They're similar
to the MSR based ones except the access is memory-io instead of MSR.
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