lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Fri, 27 Apr 2012 15:25:05 +0800
From:	Shawn Guo <shawn.guo@...aro.org>
To:	Jean-Christophe PLAGNIOL-VILLARD <plagnioj@...osoft.com>
Cc:	Dong Aisheng <b29396@...escale.com>, b20223@...escale.com,
	linus.walleij@...ricsson.com, devicetree-discuss@...ts.ozlabs.org,
	linux-kernel@...r.kernel.org, rob.herring@...xeda.com,
	kernel@...gutronix.de, cjb@...top.org, s.hauer@...gutronix.de,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 2/4] pinctrl: pinctrl-imx: add imx pinctrl core driver

On Fri, Apr 27, 2012 at 08:28:16AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 13:48 Fri 27 Apr     , Shawn Guo wrote:
> > On Thu, Apr 26, 2012 at 05:15:36PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > We have on Imx mxc at91 and other SoC controler hich you configure per pin
> > > 
> > > which means one pin have multiple function and the same function is on
> > > multiple pins
> > > 
> > > so the groups are just a list of possible pins
> > > 
> > > Instead of re-inventing bindings we do need to come with a common binding whre
> > > it's possible
> > > 
> > > So instead I proppose (send in the v2) to use common way to describe the group
> > > 
> > Let's see how many nodes we will have in device tree.  For imx6q
> > example, there are 332 pins and each pin has up to 8 function selects.
> > We will end up with having 332 x 8 = 2656 sub nodes under node
> > "functions".  Device tree simply cannot afford such a bloating.
> device tree can offord it
> 
No.  Device tree maintainers has told that.  Looking into the clock DT
binding discussion, you will find that Grant does not like to have
even 100~200 nodes to represent an entire clock tree in the DT.

With your proposal (actually this has been proposed long time before),
to represent the pins for a 24bit display, it easily consumes 28 nodes
on mach-mxs, while my binding only needs one node.  So in short, the
proposal has been discussed and it's not a sensible one.

Regards,
Shawn

> except you are going to have hundereds of duplicated pinctrl configuration
> as different board will have different mux which is impossbile to maintain
> either
> 
> and I do not expect we add all the configuration possible but just the common
> one
> 
> Best Regards,
> J.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ