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Date:	Fri, 27 Apr 2012 18:23:53 +0200
From:	Stephane Eranian <eranian@...gle.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	Robert Richter <robert.richter@....com>,
	Ingo Molnar <mingo@...e.hu>,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 06/12] perf/x86-ibs: Precise event sampling with IBS for
 AMD CPUs

On Fri, Apr 27, 2012 at 6:21 PM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Fri, 2012-04-27 at 18:09 +0200, Robert Richter wrote:
>>
>> But do you agree to have level 1 and 2 mapped to ibs, not just only
>> level 2 (since I don't want to fail with r076:p)?
>
> Sure, you can have 1 and 2 mean the same. 2 wants 0 skid, 1 wants
> constant skid, 0 is a constant, therefore its consistent.

Yes. With IBS I would expect no difference in the samples between
level  1 and 2. But that's okay. As Peter says, it still fits within the
definitions of those levels.
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